The use of group III-nitride substrates has become popular for fabricating a non-planar region in a non-planar heterostructure field effect transistor. A non-planar heterostructure field effect transistor is a field effect transistor comprising several different semiconductor layers of semiconductor material, wherein the top layer has a non-planar region. Typically a gate is then formed in the non-planar region. By forming the gate in the non-planar region, the parasitic resistance of the heterostructure field effect transistor is lowered. Furthermore, a higher breakdown voltage and transconductance, as discussed below, can be achieved. However, fabricating a non-planar heterostructure field effect transistor using group III-nitride substrates can be troublesome.
Transconductance is a measure of how the output current of the device changes with the applied voltage at the input of the device. The breakdown voltage is a threshold voltage, which, when exceeded, causes current in the gate to flow uncontrollably. This ultimately leads to the destruction of the device. The breakdown voltage is directly related to the bandgap as described above. Another benefit of having a higher breakdown voltage is improved gate modulation of the channel under a strong RF input drive, which improves power performance of the transistor.
The use of group III-nitride substrates to fabricate a non-planar region in the top layer is popular because group III-nitride substrates have much higher bandgaps than more traditional substrates such as silicon. The bandgap of a substrate refers to the degree to which it can support an applied electric field before breaking down. Thus, the applied voltage that a substrate can maintain is directly proportional to the bandgap of the substrate.
Previous attempts have been made to fabricate a non-planar heterostructure field effect transistor with a top layer comprising GaN, a group III-nitride substrate. However, using GaN has presented problems. When using a wet-etch there is no reliable or controllable method for controlling the regions in the GaN which are being etched. As a result, if the GaN layer is overetched, the layers beneath the GaN layer would be damaged by the wet etchant. There have also been attempts at fabricating a non-planar region in AlGaN where the AlGaN layer was partially wet-etched. Like GaN, using a wet-etch with AlGaN presented problems with controlling the area being etched and the depth of the etched area.
Dry etching processes have also been used in an attempt to create a non-planar region in a GaN substrate. However, dry etching introduces unrecoverable damage to the surface of the GaN substrate. Similar damage is also present when using an AlGaN substrate. The surface damage can be repaired by a post-annealing process, but removing all the surface damage is not possible. Another problem with dry-etching in GaN and AlGaN is the difficulty in controlling the etch depth. Techniques attempting to fabricate recessed gates using GaN are discussed in J. W. Burm et al., “Recessed gate GaN MODFETS,” Solid-State Electronics vol 41, pp. 247-250 (1997), and T. Egawa et al., “Recessed gate AlGaN/GaN MODFET on Sapphire grown by MOCVD,” IEDM tech Digest, pp. 401-404 (1999). These references both use dry-etching techniques to fabricate the recessed gate.
Therefore, there is a need for a method for fabricating a non-planar heterostructure field effect transistor, wherein the non-planar region is fabricated in a group III-nitride material. There is also a need for a non-planar heterostructure field effect transistor in which dry-etching and wet-etching techniques can be used to create the non-planar region which does not induce damage to the transistor and allows good control of the etching depth.